1. Field of the Invention
The invention relates generally to the growth of Group II-VI semiconductor films for use in infrared detection devices and, more particularly, to the in situ growth of p-type doped HgCdTe films.
2. Description of the Related Art
The formation of p-type layers in Group II-VI semiconductor structures is critical to the production of heterojunction, multileveled structures for use in infrared ("IR") detectors. While suitable n-type doping techniques are known, present p-type doping techniques for Group II-VI semiconductors, such as HgCdTe alloys, leave significant room for improvement.
Molecular beam epitaxy ("MBE"), a vacuum deposition process, is a typical method of preparing HgCdTe alloys. A conventional MBE process for the growth of an HgCdTe alloy is described in J. P. Faurie et al., "Molecular Beam Epitaxy of II-VI Compounds: Cd.sub.x Hg.sub.1-x Te," J. Cryst. Growth, Vol. 54, No. 3, pp. 582-585 (1981), the disclosure of which is incorporated herein by reference. MBE growth processes provide for in situ growth of high quality epilayers and abrupt heterojunctions, each of which is desirable for the construction of high performance IR detectors. Such in situ growth processes also advantageously produce multilayer devices in a single growth run.
U.S. Pat. No. 5,028,561 (assigned to the assignee of the present application) discloses an MBE process for growing a p-type HgCdTe film utilizing a dopant flux generated from an X.sub.3 Y.sub.2 compound, where X is a Group II element such as cadmium (Cd) and Y is a Group V element such as arsenic (As). Such a dopant flux provides sufficient Group II element to occupy metal (usually mercury (Hg)) vacancies in the Group II sublattice, thereby leaving the Group V dopant (arsenic) available to enter the Group VI sublattice to achieve p-type doping.
Providing both the Group II element and the Group V element is necessary because the Group V element (arsenic) is amphoteric in Group II-VI semiconductors such as HgCdTe and ZnSe. The arsenic could, therefore, dope the growing layer n-type by occupying the metal vacancies rather than entering the Group VI sublattice.
However, the preferred X.sub.3 Y.sub.2 compound in the aforementioned process, Cd.sub.3 As.sub.2, is very difficult to obtain in high purities. To achieve a suitable purity level of, for instance, 99.99999%, additional costly and potentially ineffectual purification steps must be performed. Without sufficient purification, impurities such as organic compounds and/or water vapor left in the flux may compensate the p-type dopants to a potentially large extent.
Other techniques used to p-type dope HgCdTe alloys have been found undesirable. For example, ion implantation techniques generally cause too much damage to the lattice, thereby requiring significant repair efforts involving relatively high temperature annealing that destroys the heterojunction interfaces. For this reason, these techniques are not readily applied to the fabrication of n-p-n multilayer structures. Moreover, devices fabricated by ion implantation techniques may have significantly reduced minority carrier lifetimes due to lingering effects created from the implant.
Another approach to growing p-type doped HgCdTe films involves an interdiffused superlattice process ("ISP"), which includes the growth of a p-type HgTe/CdTe superlattice structure wherein the CdTe layer is doped with arsenic. In this process, a high temperature anneal (at about 450.degree. C.) under mercury overpressure creates an HgCdTe epilayer through interdiffusion. The high temperature anneal is followed by a mercury vacancy anneal at a comparatively low temperature (about 250.degree. C.). Suitable p-type doping of the epilayer is accomplished by doping the CdTe layer, which may be done under excess mercury flux so that the arsenic dopant can be selectively incorporated into the Group VI sublattice.
However, devices constructed through the ISP process have encountered several problems believed to be based on the following structural defects. First, the arsenic may not be uniformly distributed after the high temperature anneal. Furthermore, the high temperature anneal typically destroys the p-n junction interface, thereby rendering it difficult to control the precise junction location. Finally, the quality of the superlattice may be compromised due to differences in the optimal growth temperatures of the individual layers.